Hold-in, Pull-in and Lock-in Ranges for Phase-locked Loop with Tangential Characteristic of the Phase Detector
Blagov, M. V., Kuznetsova, O. A., Kudryashov, E. V., Kuznetsov, N., Mokaev, T. N., Mokaev, R. N., Yuldashev, M. V., & Yuldashev, R. V. (2019). Hold-in, Pull-in and Lock-in Ranges for Phase-locked Loop with Tangential Characteristic of the Phase Detector. In A. Diveev, I. Zelinka, F. L. Pereira, & E. Nikulchev (Eds.), INTELS ’18 : Proceedings of the 13th International Symposium “Intelligent Systems" (pp. 558-566). Elsevier. Procedia Computer Science, 150. https://doi.org/10.1016/j.procs.2019.02.093
Julkaistu sarjassa
Procedia Computer ScienceTekijät
Päivämäärä
2019Tekijänoikeudet
© 2019 The Author(s).
In the present paper the phase-locked loop (PLL), an electric circuit widely used in telecommunications and computer architectures is considered. A new modification of the PLL with tangential phase detector characteristic and active proportionally-integrating (PI) filter is introduced. Hold-in, pull-in and lock-in ranges for given circuit are studied rigorously. It is shown that lock-in range of the new PLL model is infinite, compared to the finite lock-in range of the classical PLL.
Julkaisija
ElsevierKonferenssi
International Symposium “Intelligent Systems"Kuuluu julkaisuun
INTELS ’18 : Proceedings of the 13th International Symposium “Intelligent Systems"ISSN Hae Julkaisufoorumista
1877-0509Asiasanat
Julkaisu tutkimustietojärjestelmässä
https://converis.jyu.fi/converis/portal/detail/Publication/29721900
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