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dc.contributor.authorBlagov, M. V.
dc.contributor.authorKuznetsova, O. A.
dc.contributor.authorKudryashov, E. V.
dc.contributor.authorKuznetsov, Nikolay
dc.contributor.authorMokaev, T. N.
dc.contributor.authorMokaev, R. N.
dc.contributor.authorYuldashev, M. V.
dc.contributor.authorYuldashev, R. V.
dc.contributor.editorDiveev, Askhat
dc.contributor.editorZelinka, Ivan
dc.contributor.editorPereira, Fernando Lobo
dc.contributor.editorNikulchev, Eugeny
dc.date.accessioned2019-04-16T04:45:48Z
dc.date.available2019-04-16T04:45:48Z
dc.date.issued2019
dc.identifier.citationBlagov, M. V., Kuznetsova, O. A., Kudryashov, E. V., Kuznetsov, N., Mokaev, T. N., Mokaev, R. N., Yuldashev, M. V., & Yuldashev, R. V. (2019). Hold-in, Pull-in and Lock-in Ranges for Phase-locked Loop with Tangential Characteristic of the Phase Detector. In A. Diveev, I. Zelinka, F. L. Pereira, & E. Nikulchev (Eds.), <i>INTELS ’18 : Proceedings of the 13th International Symposium “Intelligent Systems"</i> (pp. 558-566). Elsevier. Procedia Computer Science, 150. <a href="https://doi.org/10.1016/j.procs.2019.02.093" target="_blank">https://doi.org/10.1016/j.procs.2019.02.093</a>
dc.identifier.otherCONVID_29721900
dc.identifier.otherTUTKAID_81188
dc.identifier.urihttps://jyx.jyu.fi/handle/123456789/63502
dc.description.abstractIn the present paper the phase-locked loop (PLL), an electric circuit widely used in telecommunications and computer architectures is considered. A new modification of the PLL with tangential phase detector characteristic and active proportionally-integrating (PI) filter is introduced. Hold-in, pull-in and lock-in ranges for given circuit are studied rigorously. It is shown that lock-in range of the new PLL model is infinite, compared to the finite lock-in range of the classical PLL.fi
dc.format.extent764
dc.format.mimetypeapplication/pdf
dc.language.isoeng
dc.publisherElsevier
dc.relation.ispartofINTELS ’18 : Proceedings of the 13th International Symposium “Intelligent Systems"
dc.relation.ispartofseriesProcedia Computer Science
dc.rightsCC BY-NC-ND 4.0
dc.subject.othercapture range
dc.subject.otherhold-in range
dc.subject.otherpull-in range
dc.subject.otherlock-in range
dc.subject.othernonlinear analysis
dc.subject.otherphase-locked loop
dc.titleHold-in, Pull-in and Lock-in Ranges for Phase-locked Loop with Tangential Characteristic of the Phase Detector
dc.typeconferenceObject
dc.identifier.urnURN:NBN:fi:jyu-201904122167
dc.contributor.laitosInformaatioteknologian tiedekuntafi
dc.contributor.laitosFaculty of Information Technologyen
dc.contributor.oppiaineTietotekniikkafi
dc.contributor.oppiaineMathematical Information Technologyen
dc.type.urihttp://purl.org/eprint/type/ConferencePaper
dc.date.updated2019-04-12T09:15:18Z
dc.type.coarhttp://purl.org/coar/resource_type/c_5794
dc.description.reviewstatuspeerReviewed
dc.format.pagerange558-566
dc.relation.issn1877-0509
dc.relation.numberinseries0
dc.relation.volume150
dc.type.versionpublishedVersion
dc.rights.copyright© 2019 The Author(s).
dc.rights.accesslevelopenAccessfi
dc.relation.conferenceInternational Symposium “Intelligent Systems"
dc.subject.ysoelektroniset piirit
dc.subject.ysomatemaattiset mallit
dc.format.contentfulltext
jyx.subject.urihttp://www.yso.fi/onto/yso/p953
jyx.subject.urihttp://www.yso.fi/onto/yso/p11401
dc.rights.urlhttps://creativecommons.org/licenses/by-nc-nd/4.0/
dc.relation.doi10.1016/j.procs.2019.02.093
dc.type.okmA4


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