Novel qutrit circuit design for multiplexer, De-multiplexer, and decoder

Abstract

Designing conventional circuits present many challenges, including minimizing internal power dissipation. An approach to overcoming this problem is utilizing quantum technology, which has attracted significant attention as an alternative to Nanoscale CMOS technology. The reduction of energy dissipation makes quantum circuits an up-and-coming emerging technology. Ternary logic can potentially diminish the quantum circuit width, which is currently a limitation in quantum technologies. Using qutrit instead of qubit could play an essential role in the future of quantum computing. First, we propose two approaches for quantum ternary decoder circuit in this context. Then, we propose a quantum ternary multiplexer and quantum ternary demultiplexer to exploit the constructed quantum ternary decoder circuit. Techniques to achieve lower quantum cost are of importance. We considered two types of circuits, one in which the output states are always restored to the initial input states and the other in which the states of the output are irrelevant. We compare the proposed quantum ternary circuits with their existing counterparts and present the improvements. It is possible to realize the proposed designs using macro-level ternary gates that are based on the ion-trap realizable ternary 2-qutrit Muthukrishnan–Stroud and 1-qutrit permutation gates.