dc.contributor.author | Kuznetsov, N.V. | |
dc.contributor.author | Matveev, A.S. | |
dc.contributor.author | Yuldashev, M.V. | |
dc.contributor.author | Yuldashev, R.V. | |
dc.contributor.author | Bianchi, G. | |
dc.date.accessioned | 2021-04-23T09:20:03Z | |
dc.date.available | 2021-04-23T09:20:03Z | |
dc.date.issued | 2020 | |
dc.identifier.citation | Kuznetsov, N.V., Matveev, A.S., Yuldashev, M.V., Yuldashev, R.V., & Bianchi, G. (2020). Stability of charge-pump phase-locked loops : the hold-in and pull-in ranges. <i>IFAC-PapersOnLine</i>, <i>53</i>(2), 2022-2026. <a href="https://doi.org/10.1016/j.ifacol.2020.12.2511" target="_blank">https://doi.org/10.1016/j.ifacol.2020.12.2511</a> | |
dc.identifier.other | CONVID_67407619 | |
dc.identifier.uri | https://jyx.jyu.fi/handle/123456789/75177 | |
dc.description.abstract | The problem of design and analysis of synchronization control circuits is a challenging task for many applications: satellite navigation, digital communication, wireless networks, and others. In this article the Charge-Pump Phase-Locked Loop (CP-PLL) electronic circuit, which is used for frequency synthesis and clock generation in computer architectures, is studied. Analysis of CP-PLL is not trivial: full mathematical model, rigorous definitions, and analysis still remain open issues in many respects. This article is devoted to development of a mathematical model, taking into account engineering aspects of the circuit, interpretation of core engineering problems, definition in relation to mathematical model, and rigorous analysis. | en |
dc.format.mimetype | application/pdf | |
dc.language | eng | |
dc.language.iso | eng | |
dc.publisher | Elsevier | |
dc.relation.ispartofseries | IFAC-PapersOnLine | |
dc.rights | CC BY-NC-ND 4.0 | |
dc.subject.other | CP-PLL | |
dc.subject.other | charge-pump | |
dc.subject.other | phase-locked loops | |
dc.subject.other | phase-frequency detector | |
dc.subject.other | PFD | |
dc.subject.other | hold-in range | |
dc.subject.other | pull-in range | |
dc.subject.other | control of phase synchronization | |
dc.subject.other | nonlinear analysis | |
dc.title | Stability of charge-pump phase-locked loops : the hold-in and pull-in ranges | |
dc.type | article | |
dc.identifier.urn | URN:NBN:fi:jyu-202104232471 | |
dc.contributor.laitos | Informaatioteknologian tiedekunta | fi |
dc.contributor.laitos | Faculty of Information Technology | en |
dc.contributor.oppiaine | Tietotekniikka | fi |
dc.contributor.oppiaine | Mathematical Information Technology | en |
dc.type.uri | http://purl.org/eprint/type/JournalArticle | |
dc.type.coar | http://purl.org/coar/resource_type/c_2df8fbb1 | |
dc.description.reviewstatus | peerReviewed | |
dc.format.pagerange | 2022-2026 | |
dc.relation.issn | 2405-8963 | |
dc.relation.numberinseries | 2 | |
dc.relation.volume | 53 | |
dc.type.version | publishedVersion | |
dc.rights.copyright | © Authors, 2020 | |
dc.rights.accesslevel | openAccess | fi |
dc.subject.yso | elektroniset piirit | |
dc.subject.yso | säätöteoria | |
dc.subject.yso | säätötekniikka | |
dc.subject.yso | matemaattiset mallit | |
dc.format.content | fulltext | |
jyx.subject.uri | http://www.yso.fi/onto/yso/p953 | |
jyx.subject.uri | http://www.yso.fi/onto/yso/p868 | |
jyx.subject.uri | http://www.yso.fi/onto/yso/p5636 | |
jyx.subject.uri | http://www.yso.fi/onto/yso/p11401 | |
dc.rights.url | https://creativecommons.org/licenses/by-nc-nd/4.0/ | |
dc.relation.doi | 10.1016/j.ifacol.2020.12.2511 | |
jyx.fundinginformation | The work is supported by the Russian Science Foundation(project 19-41-02002). | |
dc.type.okm | A1 | |