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dc.contributor.authorBen Yehuda, Raz
dc.contributor.authorZaidenberg, Jacob
dc.date.accessioned2020-01-31T09:33:48Z
dc.date.available2020-01-31T09:33:48Z
dc.date.issued2020
dc.identifier.citationBen Yehuda, R., & Zaidenberg, J. (2020). Protection against reverse engineering in ARM. <i>International Journal of Information Security</i>, <i>19</i>(1), 39-51. <a href="https://doi.org/10.1007/s10207-019-00450-1" target="_blank">https://doi.org/10.1007/s10207-019-00450-1</a>
dc.identifier.otherCONVID_32424084
dc.identifier.urihttps://jyx.jyu.fi/handle/123456789/67650
dc.description.abstractWith the advent of the mobile industry, we face new security challenges. ARM architecture is deployed in most mobile phones, homeland security, IoT, autonomous cars and other industries, providing a hypervisor API (via virtualization extension technology). To research the applicability of this virtualization technology for security in this platform is an interesting endeavor. The hypervisor API is an addition available for some ARMv7-a and is available with any ARMv8-a processor. Some ARM platforms also offer TrustZone, which is a separate exception level designed for trusted computing. However, TrustZone may not be available to engineers as some vendors lock it. We present a method of applying a thin hypervisor technology as a generic security solution for the most common operating system on the ARM architecture. Furthermore, we discuss implementation alternatives and differences, especially in comparison with the Intel architecture and hypervisor with TrustZone approaches. We provide performance benchmarks for using hypervisors for reverse engineering protection.en
dc.format.mimetypeapplication/pdf
dc.languageeng
dc.language.isoeng
dc.publisherSpringer
dc.relation.ispartofseriesInternational Journal of Information Security
dc.rightsIn Copyright
dc.subject.othersecurity
dc.subject.otherARM
dc.subject.othermobile
dc.subject.otherIoT
dc.subject.otherhypervisor
dc.titleProtection against reverse engineering in ARM
dc.typearticle
dc.identifier.urnURN:NBN:fi:jyu-202001311915
dc.contributor.laitosInformaatioteknologian tiedekuntafi
dc.contributor.laitosFaculty of Information Technologyen
dc.contributor.oppiaineTietotekniikkafi
dc.contributor.oppiaineMathematical Information Technologyen
dc.type.urihttp://purl.org/eprint/type/JournalArticle
dc.type.coarhttp://purl.org/coar/resource_type/c_2df8fbb1
dc.description.reviewstatuspeerReviewed
dc.format.pagerange39-51
dc.relation.issn1615-5262
dc.relation.numberinseries1
dc.relation.volume19
dc.type.versionacceptedVersion
dc.rights.copyright© Springer-Verlag GmbH Germany, part of Springer Nature 2019
dc.rights.accesslevelopenAccessfi
dc.subject.ysoesineiden internet
dc.subject.ysolangaton tekniikka
dc.subject.ysomikroprosessorit
dc.subject.ysomobiililaitteet
dc.subject.ysotakaisinmallinnus
dc.subject.ysotietoturva
dc.format.contentfulltext
jyx.subject.urihttp://www.yso.fi/onto/yso/p27206
jyx.subject.urihttp://www.yso.fi/onto/yso/p23070
jyx.subject.urihttp://www.yso.fi/onto/yso/p13435
jyx.subject.urihttp://www.yso.fi/onto/yso/p4834
jyx.subject.urihttp://www.yso.fi/onto/yso/p28853
jyx.subject.urihttp://www.yso.fi/onto/yso/p5479
dc.rights.urlhttp://rightsstatements.org/page/InC/1.0/?language=en
dc.relation.doi10.1007/s10207-019-00450-1
dc.type.okmA1


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