| dc.contributor.author | Javanainen, Arto | |
| dc.contributor.author | Ferlet-Cavrois, Véronique | |
| dc.contributor.author | Bosser, Alexandre | |
| dc.contributor.author | Jaatinen, Jukka | |
| dc.contributor.author | Kettunen, Heikki | |
| dc.contributor.author | Muschitiello, Michele | |
| dc.contributor.author | Pintacuda, Francesco | |
| dc.contributor.author | Rossi, Mikko | |
| dc.contributor.author | Schwank, James R. | |
| dc.contributor.author | Shaneyfelt, Marty R. | |
| dc.contributor.author | Virtanen, Ari | |
| dc.date.accessioned | 2015-03-09T08:22:53Z | |
| dc.date.available | 2015-03-09T08:22:53Z | |
| dc.date.issued | 2014 | |
| dc.identifier.citation | Javanainen, A., Ferlet-Cavrois, V., Bosser, A., Jaatinen, J., Kettunen, H., Muschitiello, M., Pintacuda, F., Rossi, M., Schwank, J. R., Shaneyfelt, M. R., & Virtanen, A. (2014). SEGR in SiO2-Si3N4 Stacks. <i>IEEE transactions on Nuclear Science</i>, <i>61</i>(4), 1902-1908. <a href="https://doi.org/10.1109/TNS.2014.2303493" target="_blank">https://doi.org/10.1109/TNS.2014.2303493</a> | |
| dc.identifier.other | CONVID_23827716 | |
| dc.identifier.other | TUTKAID_62738 | |
| dc.identifier.uri | https://jyx.jyu.fi/handle/123456789/45471 | |
| dc.description.abstract | Abstract. This work presents experimental Single Event Gate
Rupture (SEGR) data for Metal–Insulator–Semiconductor (MIS)
devices, where the gate dielectrics are made of stacked SiO2–Si3N4
structures. A semi-empirical model for predicting the
critical gate voltage in these structures under heavy-ion exposure
is first proposed. Then interrelationship between SEGR cross-
section and heavy-ion induced energy deposition probability in
thin dielectric layers is discussed. Qualitative connection between
the energy deposition in the dielectric and the SEGR is proposed. | fi |
| dc.language.iso | eng | |
| dc.publisher | Institute of Electrical and Electronics Engineers | |
| dc.relation.ispartofseries | IEEE transactions on Nuclear Science | |
| dc.subject.other | modeling | |
| dc.subject.other | MOS | |
| dc.subject.other | semi-empirical | |
| dc.subject.other | Single Event Gate Rupture (SEGR) | |
| dc.title | SEGR in SiO2-Si3N4 Stacks | |
| dc.type | article | |
| dc.identifier.urn | URN:NBN:fi:jyu-201409132790 | |
| dc.contributor.laitos | Fysiikan laitos | fi |
| dc.contributor.laitos | Department of Physics | en |
| dc.contributor.oppiaine | Fysiikka | fi |
| dc.contributor.oppiaine | Kiihdytinlaboratorio | fi |
| dc.contributor.oppiaine | Physics | en |
| dc.contributor.oppiaine | Accelerator Laboratory | en |
| dc.type.uri | http://purl.org/eprint/type/JournalArticle | |
| dc.date.updated | 2014-09-13T03:30:08Z | |
| dc.type.coar | http://purl.org/coar/resource_type/c_2df8fbb1 | |
| dc.description.reviewstatus | peerReviewed | |
| dc.format.pagerange | 1902-1908 | |
| dc.relation.issn | 0018-9499 | |
| dc.relation.numberinseries | 4 | |
| dc.relation.volume | 61 | |
| dc.type.version | acceptedVersion | |
| dc.rights.copyright | © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works. | |
| dc.rights.accesslevel | openAccess | fi |
| dc.relation.doi | 10.1109/TNS.2014.2303493 | |
| dc.type.okm | A1 | |
