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dc.contributor.authorRobertsén, Fredrik
dc.contributor.authorWesterholm, Jan
dc.contributor.authorMattila, Keijo
dc.date.accessioned2017-07-31T14:01:12Z
dc.date.available2017-07-31T14:01:12Z
dc.date.issued2017
dc.identifier.citationRobertsén, F., Westerholm, J., & Mattila, K. (2017). Designing a graphics processing unit accelerated petaflop capable lattice Boltzmann solver: Read aligned data layouts and asynchronous communication. <i>International Journal of High Performance Computing Applications</i>, <i>31</i>(3), 246-255. <a href="https://doi.org/10.1177/1094342016658109" target="_blank">https://doi.org/10.1177/1094342016658109</a>
dc.identifier.otherCONVID_27057602
dc.identifier.otherTUTKAID_74093
dc.identifier.urihttps://jyx.jyu.fi/handle/123456789/54958
dc.description.abstractThe lattice Boltzmann method is a well-established numerical approach for complex fluid flow simulations. Recently, general-purpose graphics processing units (GPUs) have become available as high-performance computing resources at large scale. We report on designing and implementing a lattice Boltzmann solver for multi-GPU systems that achieves 1.79 PFLOPS performance on 16,384 GPUs. To achieve this performance, we introduce a GPU compatible version of the so-called bundle data layout and eliminate the halo sites in order to improve data access alignment. Furthermore, we make use of the possibility to overlap data transfer between the host central processing unit and the device GPU with computing on the GPU. As a benchmark case, we simulate flow in porous media and measure both strong and weak scaling performance with the emphasis being on large-scale simulations using realistic input data.
dc.language.isoeng
dc.publisherSage
dc.relation.ispartofseriesInternational Journal of High Performance Computing Applications
dc.subject.otherLattice Boltzmann
dc.subject.othergraphics processing unit
dc.subject.otherTitan
dc.subject.otherasynchronous communication
dc.subject.othermemory alignment
dc.subject.otherdata layout
dc.subject.otherlarge-scale I/O
dc.subject.otherload balance
dc.titleDesigning a graphics processing unit accelerated petaflop capable lattice Boltzmann solver: Read aligned data layouts and asynchronous communication
dc.typearticle
dc.identifier.urnURN:NBN:fi:jyu-201707193327
dc.contributor.laitosFysiikan laitosfi
dc.contributor.laitosDepartment of Physicsen
dc.type.urihttp://purl.org/eprint/type/JournalArticle
dc.date.updated2017-07-19T09:15:03Z
dc.type.coarjournal article
dc.description.reviewstatuspeerReviewed
dc.format.pagerange246-255
dc.relation.issn1094-3420
dc.relation.numberinseries3
dc.relation.volume31
dc.type.versionacceptedVersion
dc.rights.copyright© The Author(s) 2016. This is a final draft version of an article whose final and definitive form has been published by Sage. Published in this repository with the kind permission of the publisher.
dc.rights.accesslevelopenAccessfi
dc.subject.ysovirtauslaskenta
dc.subject.ysoprosessorit
jyx.subject.urihttp://www.yso.fi/onto/yso/p21150
jyx.subject.urihttp://www.yso.fi/onto/yso/p10874
dc.relation.doi10.1177/1094342016658109


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